Page 29 - EE2449_TTL_Datasheet

SN54/74LS90 • SN54/74LS92 • SN54/74LS93

LS90 LS92 AND LS93
MODE SELECTION MODE SELECTION
RESET/SET INPUTS OUTPUTS RESET
INPUTS OUTPUTS
MR 1 MR 2 MS 1 MS 2 Q 0 Q 1 Q 2 Q 3
MR 1 MR 2 Q 0 Q 1 Q 2 Q 3
H H L X L L L L
H H X L L L L L H H L L L L
X X H H H L L H L H Count
L X L X Count H L Count
X L X L Count L L Count
L X X L Count
H = HIGH Voltage Level
X L L X Count
L = LOW Voltage Level
H = HIGH Voltage Level X = Don’t Care
L = LOW Voltage Level
X = Don’t Care

LS90 LS92 LS93
BCD COUNT SEQUENCE TRUTH TABLE TRUTH TABLE
OUTPUT OUTPUT OUTPUT
COUNT COUNT COUNT
Q 0 Q 1 Q 2 Q 3 Q 0 Q 1 Q 2 Q 3 Q 0 Q 1 Q 2 Q 3
0 L L L L 0 L L L L 0 L L L L
1 H L L L 1 H L L L 1 H L L L
2 L H L L 2 L H L L 2 L H L L
3 H H L L 3 H H L L 3 H H L L
4 L L H L 4 L L H L 4 L L H L
5 H L H L 5 H L H L 5 H L H L
6 L H H L 6 L L L H 6 L H H L
7 H H H L 7 H L L H 7 H H H L
8 L L L H 8 L H L H 8 L L L H
9 H L L H 9 H H L H 9 H L L H
10 L L H H 10 L H L H
NOTE: Output Q 0 is connected to Input
CP 1 for BCD count. 11 H L H H 11 H H L H
NOTE: Output Q 0 is connected to Input 12 L L H H
CP 1 . 13 H L H H
14 L H H H
15 H H H H
NOTE: Output Q 0 is connected to Input
CP 1 .

FAST AND LS TTL DATA
5-92
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